发明名称 METHOD FOR EVALUATING RESISTANCE TO SOLDERING HEAT AT SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To determine a soldering temperature which prevents cracks to semiconductor devices on the basis of an interfacial moisture concentration of the semiconductor devices and a heating temperature of a solder bath. SOLUTION: A plurality of semiconductor devices are left in a high-temperature and high- humidity bath having a desired atmosphere condition until the interfacial moisture concentration of semiconductor devices of any kind is saturated. Thereafter, these semiconductor devices are separated to a plurality of groups and soaked in a plurality of solder baths having different heating temperatures. Subsequently, the presence/absence of generation of cracks to the semiconductor device is detected for each semiconductor device. The presence/ absence of generation of cracks is distinguished and plotted for every atmosphere condition where the semiconductor device is left in the high-temperature and high-humidity bath and for every heating temperature of the solder bath. A crack limit graph is formed by connecting limit value plots where no crack is generated. An experimental equation is expressed by Q=C.exp(Ea/kT). No crack is generated if the solder heating temperature T which satisfies Qm>Q is determined wherein Q is the interfacial moisture concentration, T is the solder heating temperature (absolute temperature), C is a crack constant, Ea is an activation energy, k is a Boltzmann constant and Qm is a critical interfacial moisture concentration.
申请公布号 JP2003065981(A) 申请公布日期 2003.03.05
申请号 JP20010261771 申请日期 2001.08.30
申请人 SONY CORP 发明人 ETO YOSHIHIRO;YAMAGATA JUNKO
分类号 G01N25/18;B23K1/00;H01L23/29;H01L23/31;H05K3/34;(IPC1-7):G01N25/18 主分类号 G01N25/18
代理机构 代理人
主权项
地址