| 摘要 |
PROBLEM TO BE SOLVED: To provide a small drive device, together with a display module provided with it, of high reliability in display picture quality, even to a display data signal made to have a high frequency. SOLUTION: A data latch circuit 12 of a source driver 1 is provided with DFFs 12A, 12B, and 12D which take in display data signal R.G.B in synchronous with both rising timing and falling timing of a clock signal SCK whose frequency is 1/2 of the display data signal R.G.B. The DFFs 12A, 12B, and 12D separately output data signal R.G.B taken in at the rising timing of the clock signal SCK and the display data signal R.G.B taken at the falling timing of the clock signal SCK, to a sampling memory circuit 14.
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