发明名称 Methods for forming wiring line structures in semiconductor devices
摘要 Embodiments include a manufacturing method for a semiconductor device which can suppress a concave from being generated in an upper area of a wiring layer at a position above plug. The method may include the steps of (a) forming an impurity diffusion layer 34; (b) forming, on the impurity diffusion layer 34, an interlayer insulating layer 40 having at least one. through hole 42; (c) forming a plug 50 in the through hole 42; (d) forming an underlying layer 62 on the plug 50 and the interlayer insulating layer 40, and (e) forming an aluminum layer 64 on the underlying layer 62, the aluminum layer 64 being formed at a substrate temperature not lower than 250° C. and under a reduced pressure.
申请公布号 US6528414(B1) 申请公布日期 2003.03.04
申请号 US19990376879 申请日期 1999.08.18
申请人 SEIKO EPSON CORPORATION 发明人 KASUYA YOSHIKAZU
分类号 H01L21/28;H01L21/3205;H01L21/768;H01L23/52;(IPC1-7):H01L21/476 主分类号 H01L21/28
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