发明名称 |
Semiconductor memory device and data read method thereof |
摘要 |
A semiconductor memory device includes a memory cell array and a differential amplifying and latching circuit for latching and outputting each of signal pairs output from the memory cell array in case of a first latency operation, and for amplifying a voltage difference of each of the signal pairs output from the memory cell array in case of a second latency operation.
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申请公布号 |
US6529432(B2) |
申请公布日期 |
2003.03.04 |
申请号 |
US20020144517 |
申请日期 |
2002.05.13 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM BYUNG-CHUL;BAE WON-IL |
分类号 |
G11C11/409;G11C7/06;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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