发明名称
摘要 PURPOSE: A semiconductor package is provided to decrease the number of insertion processes of an interposer used in stacking a chip of the same size as a conventional technology, by stacking back surfaces of the chip having no bonding pad area and by sequentially wire-bonding a bonding pad and a lead. CONSTITUTION: A part of the lower surface of the lead(12) is etched. The upper surface of a chip mounting plate(28) is etched by a predetermined thickness. A supporting member(14) is attached to the edge of the upper surface of the lead. The first chip(16) is mounted on the chip mounting plate. The second chip(18) is attached to the upper surface of the first chip by an adhesive member. The first wire(22) connects the bonding pad of the first chip with the lower surface of the lead. The second wire(20) connects the bonding pad of the second chip with the upper surface of the lead. Resin(24) molds the semiconductor chip and the wire, making the outer side surface and lower surface of the lead, the lower surface of the chip mounting plate and the upper surface and outer side surface of the supporting member exposed to the outside.
申请公布号 KR100374542(B1) 申请公布日期 2003.03.04
申请号 KR20000065023 申请日期 2000.11.02
申请人 发明人
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
主权项
地址
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