发明名称 |
Nonvolatile semiconductor memory device including a circuit for providing a boosted potential |
摘要 |
In a flash memory EEPROM, a memory cell MC is formed in a P-type semiconductor substrate. A peripheral transistor TR is formed in an N-type well. Another peripheral transistor TR is formed in a P-type well. The P-type well is by turn formed an N-type well and electrically insulated from the substrate. The substrate is typically provided with a metal back structure and its substrate voltage is set to predetermined voltages respectively for data erasure, data storage and data retrieval. With such an arrangement, the level of voltage stress with which the device is loaded during data erasure can be remarkably reduced to allow a down-sizing and an enhanced quality to be realized for the device.
|
申请公布号 |
US6529414(B2) |
申请公布日期 |
2003.03.04 |
申请号 |
US20010978252 |
申请日期 |
2001.10.17 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ATSUMI SHIGERU;TANAKA SUMIO |
分类号 |
H01L21/8247;G11C16/08;G11C16/30;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/04 |
主分类号 |
H01L21/8247 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|