| 摘要 |
A high-speed add-compare selection apparatus, for a Viterbi algorithm processing apparatus having a branch metric calculator and a metric memory, is described. First and second previous metric values are supplied from the metric memory to first and second registers. The first previous metric value from the first register and a branch metric value of the present state calculated by the branch metric calculator are added, as are the second previous metric value from the second register and a branch metric value of the next state calculated by the branch metric calculator. The values obtained are compared and a survival metric value calculated accordingly.
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