| 摘要 |
This invention relates to a prescaler comprising a pulse swallow circuit in series connection with a divider circuit providing a fixed division ratio, wherein the pulse swallow circuit comprises the input of the prescaler and a control input and the divider comprises the output of the prescaler, wherein the pulse swallow circuit in a primary mode is arranged for admitting throughput of an input signal, wherein the pulse swallow circuit is switchable into a secondary mode for temporarily blocking the throughput of said input signal, by the apliance of a control signal pulse to said control input, and wherein the pulse swallow circuit is arranged to block said throughput for one pulse of the input signal at the receipt of said control signal pulse. The invention also relates to such a pluse swallow circuit as well as to a frequency synthesizer comprising such a prescaler. |
