| 摘要 |
PROBLEM TO BE SOLVED: To provide a musical sound signal generating circuit which can generate a rectangular wave having no cycle deviation. SOLUTION: When a timbre parameter TP is '0', an OR gate 27 enters a through state. In this case, the output of an adder 23 gradually increases and when a carry signal '1' is outputted, the signal of a carry-out terminal CO which is one clock pulse precedent appears at the output of a flip-flop 25 and is therefore '0', so that an ENOR 26 outputs '0'. Consequently, the output of an AND gate 28 is '0'. Namely, when the adder 23 outputs the carry signal '1', phase data ωt of '100...00' are outputted from a delay flip-flop 29 in the timing of a next clock pulse CLK. Thus, there is no carry of the addition data when the adder 23 overflows, and consequently the rectangular wave having no cycle deviation can be generated. |
