发明名称 LAMINATED ELECTRONIC COMPONENT AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To compose a laminated capacitor where ESL and ESR are suppressed. SOLUTION: A plurality of first via holes 4 and a plurality of second via holes 5 are formed inside a laminated capacitor. The plurality of first via holes 4 conduct electricity among a plurality of first internal electrodes 2, and allow the plurality of first internal electrodes 2 to make continuity with a plurality of first external electrodes 6 formed on the outer surface of the capacitor. The plurality of second via holes 5 conduct electricity among a plurality of second internal electrodes 3, and allow the plurality of second internal electrodes 3 to make continuity with a plurality of first external electrodes 7 formed on the outer surface of the capacitor. In each of the first and second internal electrodes 2 and 3, island-shaped internal electrode non-formation sections 11 and 13 having a diameter that is larger than that of the first and second via holes 4 and 5, and connection sections 12 and 14 for connecting the internal electrode non-formation sections 11 and 13 are formed. The first and second via holes 4 and 5 are formed at a position that crosses a region where the connecting sections 12 and 14 are provided.
申请公布号 JP2003059755(A) 申请公布日期 2003.02.28
申请号 JP20010242690 申请日期 2001.08.09
申请人 MURATA MFG CO LTD 发明人 KITAMURA HIDEKAZU;TANIGUCHI MASAAKI
分类号 H01G4/30;H01G4/38;(IPC1-7):H01G4/30 主分类号 H01G4/30
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