发明名称 SYSTEM AND METHOD FOR JTAG BRIDGE CONNECTION OF PROGRAMMABLE LOGIC DEVICE ON MULTIPLE CIRCUIT BOARDS
摘要 PROBLEM TO BE SOLVED: To provide a method for loading a configuration code easily from a constitution system to an EEPROM in spite of having a plurality of connected JTAG buses connected with the EEPROM. SOLUTION: A system (200) such as a complex computer system includes a plurality of programmable logic devices connected so as to load the configuration code from the EEPROMs (212, 214, 216). Normally, this loading is performed automatically when power is supplied. The EEPROMs are connected with one of a plurality of serial buses connecting the EEPROMs (212, 214, 216) and a common configuration logic (228), and these buses are JTAG buses typically. A processor (236) puts a programmable logic configuration code through the common configuration logic (228) from a memory and writes it in the EEPROMs (212, 214, 216) through the serial bus connecting a common configuration logic, and the system has a plurality of management processors (526, 528) capable of accessing the common configuration logic (228). The processor can be connected to a network 241 to fetch a common configuration code from a database (224) to write it into the EEPROMs.
申请公布号 JP2003058386(A) 申请公布日期 2003.02.28
申请号 JP20020213352 申请日期 2002.07.23
申请人 HEWLETT PACKARD CO <HP> 发明人 MANTEY PAUL;ERICKSON MIKE;MACIOROWSKI DAVID
分类号 G06F11/00;G06F15/78;(IPC1-7):G06F11/00 主分类号 G06F11/00
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