| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory having a preferable relieving mode for defective data. SOLUTION: This semiconductor memory is provided with a cell array provided with a normal data section used for normal write-in and read-out of data and a parity data section storing data for test for performing error detection of read-out data from the normal data section, a data buffer holding temporarily read-out data from the cell array and write-in data for the cell array, and an error detecting and correcting circuit generating data for test to be stored in the parity data section from write-in data inputted at write-in of data and performing error detection and correction of read out data based on data read out from the normal data section and data for test read out from the parity data section at read-out of data. (n) bits parallel data is delivered and received between the data buffer and the normal data section of the cell array, and (m) bits parallel data (m<n) is delivered and received between the data buffer and an external input/output terminal.
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