发明名称 CONTROL VOLTAGE GENERATING CIRCUIT, PLL CIRCUIT AND CLOCK SYNCHRONIZING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a control voltage generating circuit, a PLL circuit and a clock synchronizing circuit which are superior in following property and stability, with respect to sharp change of an input. SOLUTION: The control voltage generating circuit which forms a control voltage to be supplied to a voltage controlled oscillator is provided with at least a phase amount control unit for forming a pulse type control voltage whose width is controlled, and establishes the control as the amount of phase to an oscillation output from the voltage controlled oscillator. The PLL circuit employs the control voltage generating circuit. The clock synchronizing circuit employs the PLL circuit.
申请公布号 JP2003060502(A) 申请公布日期 2003.02.28
申请号 JP20010247754 申请日期 2001.08.17
申请人 OKI ELECTRIC IND CO LTD;OKI COMTEC LTD 发明人 TSUSHIMA TAKAAKI
分类号 H03L7/093 主分类号 H03L7/093
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