发明名称 Source/drain extension fabrication process with direct implantation
摘要 An improved source/drain extension process is provided by the following processing steps of implanting NMOS devices directly on either side of the gates without an oxide layer (step D2), covering the gates with a cap oxide layer(step E2), covering NMOS devices with photoresist(step F2), dry etching all PMOS devices (Step G2), and implanting PMOS devices (step I2)
申请公布号 US2003040169(A1) 申请公布日期 2003.02.27
申请号 US20020197988 申请日期 2002.07.18
申请人 MILES DONALD S.;GRIDER DOUGLAS T.;CHIDAMBARAM P.R.;JAIN AMITABH 发明人 MILES DONALD S.;GRIDER DOUGLAS T.;CHIDAMBARAM P.R.;JAIN AMITABH
分类号 H01L21/265;H01L21/336;H01L21/8238;(IPC1-7):H01L21/336 主分类号 H01L21/265
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