发明名称 INTEGRATED CIRCUIT WITH DRAM MEMORY CELL
摘要 <p>The invention concerns an integrated circuit comprising a substrate (1), at least a capacitor (9) arranged above the substrate (1) and provided with a first electrode (5), a second electrode (8), and a dielectric (7) arranged between the two electrodes, at least a connecting feedthrough between the substrate (1) and a conductive level located above the capacitor (9), and a dielectric material covering the substrate (1) and enclosing the capacitor (9) and the feedthrough. The feedthrough comprises a first portion (18) arranged between the substrate and the lower level of the first electrode, a second portion (6) arranged between the lower level of the first electrode and the upper level of the first electrode, and a third portion (12) in contact with the first electrode and flush with said conductive level, the second portion being made of the same material as the first electrode of the capacitor.</p>
申请公布号 WO2003017362(A1) 申请公布日期 2003.02.27
申请号 FR2002002887 申请日期 2002.08.14
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址