发明名称 |
Data transfer algorithm that does not require high latency read operations |
摘要 |
A mechanism is provided for the controlled transfer of data across LDT and PCI buses without requiring any high latency read operations. The preferred embodiment of the invention removes the need for any read accesses to a remote processor's memory or device registers, while still permitting controlled data exchange. This approach provides significant performance improvement for systems that have write buffering capability.
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申请公布号 |
US2003041176(A1) |
申请公布日期 |
2003.02.27 |
申请号 |
US20010929901 |
申请日期 |
2001.08.14 |
申请人 |
COURT JOHN WILLIAM;GRIFFITHS ANTHONY GEORGE |
发明人 |
COURT JOHN WILLIAM;GRIFFITHS ANTHONY GEORGE |
分类号 |
H04L12/56;(IPC1-7):G06F15/16;G06F15/173 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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