Conditional subtract instruction

摘要

A circuit (200) which first shifts both a dividend (220) and a divisor (230) by an extra bit such that a 1-bit shift can be avoided after subtraction of the shifted values of dividend and the divisor, while performing a conditional subtraction instruction (250). The shifted divisor can conveniently replace the dividend as required for the instruction. The approach can be used to implement, among others, 2N-bit/N-bit (denoted 2N/N) division using an N-bit ALU, N/N division using N-bit ALU. The division can be implemented for all possible values of N without requiring substantially more complexity in the implementation. <IMAGE>