发明名称 Method for forming a trench isolation structure in an integrated circuit
摘要 The reliability of integrated circuits fabricated with trench isolation is improved by forming a trench isolation structure with a void-free trench plug (36). In one embodiment, a polysilicon layer (28) is formed within a trench (22) and then subsequently oxidized to form a first dielectric layer (30). The first dielectric layer (30) is then etched and a second dielectric layer (34) is subsequently formed over the etched dielectric layer (32). A portion of the second dielectric layer (34) is then removed using chemical-mechanical polishing to form a void-free trench plug (36) within the trench (22). In addition, reliability is also improved by minimizing subsequent etching of trench plug (36) after it has been formed.
申请公布号 US6524931(B1) 申请公布日期 2003.02.25
申请号 US19990357753 申请日期 1999.07.20
申请人 MOTOROLA, INC. 发明人 PERERA ASANGA H.
分类号 H01L21/762;(IPC1-7):H01L21/762 主分类号 H01L21/762
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