发明名称 SIGNAL PROCESSING APPARATUS AND METHOD THEREFOR, PROGRAM AND RECORDING MEDIUM
摘要 PROBLEM TO BE SOLVED: To effectively use a cache memory mounted in a CPU. SOLUTION: A selector 31 outputs signals to a Y-distributor 32 for inputted digital video Y-signals and the distributor 32 distributes the Y-signals of 8 bits to a Y-FIFO 35. When the Y-FIFO 35 stores Y-outputs, the selector 38 selects outputs to be transferred among the Y-outputs putted out from the Y-FIFO 35 and transfer the selected outputs to a DMAC 40, and the DMAC 40, if accessible to a main bus 20, outputs addresses for designating areas on a DRAM 14 to the main bus 20, thus writing the Y-outputs transferred from the selector 38 into the DRAM 14 according to their addresses.
申请公布号 JP2003052052(A) 申请公布日期 2003.02.21
申请号 JP20010241156 申请日期 2001.08.08
申请人 SONY CORP 发明人 KAWAHARA HIROKAZU
分类号 G06F12/08;H04N9/64;H04N9/804;H04N9/808;H04N11/06;H04N11/24;(IPC1-7):H04N9/64 主分类号 G06F12/08
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