| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide an arithmetic processing unit that can efficiently process an ACS(Add, Compare, Select) arithmetic operation. SOLUTION: The arithmetic processing unit is provide with a path metric storing section 1 for storing path metrics, a branch metric storing section 3 for storing branch metrics, comparing sections 5, 9 for receiving two path metrics and two branch metrics and comparing two newly generated path metrics, adding sections 6, 10 for receiving the two path metrics and the two branch metrics to newly generate two path metrics, selecting sections 8, 12 for receiving two path metrics being the outputs of comparison results by the comparing sections 5, 9 and outputs from the adding sections 6, 10 to select either one of them from the comparison result and provide the output, and comparison result storing sections 7, 11 for storing the comparison results of the comparing sections 5, 9. Thus, ACS arithmetic operation is realized for Viterbi decoding with a comparatively small throughput by means of a DSP.</p> |
