发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a MOS device at a low cost, which has a high breakdown voltage MOS transistor and a low breakdown voltage MOS transistor. SOLUTION: An N<-> type semiconductor region 14 whose impurity concentration is low, and a P<-> type semiconductor region 13 whose impurity concentration is low, are formed simultaneously to a high breakdown voltage NMOS transistor and a low breakdown voltage NMOS transistor, and N<-> semiconductor regions 15 whose impurity concentration is low are formed simultaneously to the high breakdown voltage NMOS transistor and a low breakdown voltage PMOS transistor, thereby reducing ion implantation process and a photomask necessary for it.
申请公布号 JP2003051552(A) 申请公布日期 2003.02.21
申请号 JP20010236394 申请日期 2001.08.03
申请人 HITACHI LTD 发明人 OWADA FUKUO
分类号 H01L27/092;H01L21/8238;(IPC1-7):H01L21/823 主分类号 H01L27/092
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