发明名称 OPTIMIZED BURIED-CHANNEL FETS BASED ON SIGE HETEROSTRUCTURES
摘要 <p>Semiconductor-based devices, and methods for making the devices, involve a first device that includes a buried channel layer, a dielectric layer, and a compositionally graded spacer layer. The spacer layer includes a first material and a second material, and is located between the buried channel layer and the dielectric layer. A second device includes a buried channel layer, a relaxed surface layer, and a spacer layer located between the buried channel layer and the relaxed surface layer. The spacer layer has a composition that is different from a composition of the relaxed layer. The spacer layer and the relaxed surface layer each have bandgap offsets relative to the buried channel layer to reduce a parasitic channel conduction. A substrate for fabrication of devices, and methods for making the substrate, involves a substrate that includes a first layer, such as a silicon wafer, a substantially uniform second layer, and a graded-composition third layer.</p>
申请公布号 WO2003015138(A2) 申请公布日期 2003.02.20
申请号 US2002025341 申请日期 2002.08.09
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