发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device has a memory cell array including memory cells; a reference current generating circuit which generates a reference current; a reference voltage generating circuit which generates a reference voltage in a reference node on the basis of the reference current generated by the reference current generating circuit; a first sense circuit which generates an output current on the basis of a cell current of the selected memory cell and which generates a data potential in a sense node on the basis of the output current and the reference current; and a second sense circuit which detects the data held in the selected memory cell by comparing the data potential in the sense node with the reference voltage in the reference node.
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申请公布号 |
US2003035324(A1) |
申请公布日期 |
2003.02.20 |
申请号 |
US20020102981 |
申请日期 |
2002.03.22 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
FUJITA KATSUYUKI;OHSAWA TAKASHI |
分类号 |
G11C11/407;G11C7/06;(IPC1-7):G11C5/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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