Multi-module switching system

摘要

A multi-module switching system comprising at least two switching modules adapted for receiving data packets from at least one input adapter and transmitting the data packets to at least one output adapter, each of the switching modules including a shared buffer for buffering a portion of a data packet received from an input adapter and transmitting the portion to an output adapter. One of the switching modules is a master module receiving a portion of a data packet containing a packet header and sending control information contained therein serially to each other switching module as a slave module. Each slave module includes a delay computing structure adapted for computing a delay needed to transmit the control information from the master module to this slave module and a first storing structure adapted for storing a portion of a data packet transmitted from an input adapter to the slave module during the delay, before transmitting the portion to a respective shared buffer such that the portion of data packet is not received by the shared buffer before the slave module has received the control information from the master module.