发明名称 Implementing scrambler algorithms in processor-implemented data paths involves inter alia configuring data stream bit slice so data stream is combined with scrambler signal
摘要 The method involves controlling the data paths in each slice by the local multiplexer with the bit slice contained within it so that the data paths are represented by four units on one hand, and on the other hand for each computing mechanism of a bit slice the multiplexer controls a first slice so that a data stream bit slice is configured to combine a data stream passing through the computing mechanism with a scrambler signal. AN Independent claim is also included for the following: an arrangement for implementing scrambler algorithms in processor-implemented data paths.
申请公布号 DE10137458(A1) 申请公布日期 2003.02.20
申请号 DE2001137458 申请日期 2001.08.02
申请人 SYSTEMONIC AG 发明人 DRESCHER, WOLFRAM
分类号 H04L9/18;(IPC1-7):H04L9/28 主分类号 H04L9/18
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