发明名称 |
Flexible FIFO system for interfacing between datapaths of variable length |
摘要 |
A FIFO buffer arrangement is disclosed that is capable of buffering and transferring data between multiple input and output datapaths of varying widths. All of the input and output buses may be used to transfer data concurrently. Data that are written to the FIFO via any of the input buses may be extracted from the FIFO via any of the output buses. The FIFO efficiently carries out all necessary width conversions when performing the data transfers.
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申请公布号 |
US2003037190(A1) |
申请公布日期 |
2003.02.20 |
申请号 |
US20010854075 |
申请日期 |
2001.05.10 |
申请人 |
ALEXANDER THOMAS;WONG DAVID |
发明人 |
ALEXANDER THOMAS;WONG DAVID |
分类号 |
G06F3/00;G06F3/02;G06F13/00;G06F13/14;G06F13/40;(IPC1-7):G06F3/00 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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