发明名称 Method for forming high resistance resistor with integrated high voltage device process
摘要 A method for forming a high resistance resistor with an integrated high voltage device process is disclosed. First and second field oxide areas are formed on a substrate and an undoped first polysilicon layer is deposited. A first photoresist layer having a resistor pattern is formed on the first field oxide area and a first ion implant process is performed with the first photoresist layer as a mask which is then removed and an oxide nitride oxide (ONO) layer is formed on the first polysilicon layer. The ONO layer and the first polysilicon layer are etched to form a resistor on the first field oxide area and a first electrode of a capacitor on the second field oxide area. A second polysilicon layer is formed on the capacitor ONO layer as a second electrode of the capacitor. A second photoresist layer is formed on the substrate, the resistor and the capacitor and has an opening pattern to expose the resistor. The ONO layer is removed from the resistor. A second ion implant process is performed on the resistor followed by removal of the second photoresist layer. An interlevel dielectric layer is deposited over the substrate, capacitor and resistor, and then etched to form a plurality of contact holes on the capacitor and the resistor. A third photoresist layer is formed on the interlevel dielectric layer and has an opening pattern to expose the contact holes on the resistor. A third ion implant process is performed on the resistor using the third photoresist layer as a mask, followed by a rapid thermal process and deposition of a conductive material layer to fill in the plurality of contact holes.
申请公布号 US2003036276(A1) 申请公布日期 2003.02.20
申请号 US20010931953 申请日期 2001.08.20
申请人 UNITED MICROELECTRONICS CORP. 发明人 TSAI YUAN-LI;YANG MARCUS;CHEN RALPH;KAO HENG-CHUN;HWANG CHING-CHUN
分类号 H01L21/02;H01L27/06;H01L27/08;(IPC1-7):H01L21/311 主分类号 H01L21/02
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