发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PURPOSE: To provide a semiconductor integrated circuit device which has realized high speed operation, high packing density and high efficiency allocation of a RAM macro. CONSTITUTION: A memory array which is divided into four memories in the X and Y coordinates direction is allocated and a first input circuit to receive a signal for which signal delay must be optimized is allocated to the central area of such four memory arrays. A second input circuit to receive an input data and a control signal for such data input is allocated to the central area of Y coordinates corresponding to the extending direction of the word line. The signal line for transferring the input signal from the external side of the RAM macro to the first and second input circuits is formed using the wiring of upper layer to the wiring to form the memory array.
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申请公布号 |
KR20030014584(A) |
申请公布日期 |
2003.02.19 |
申请号 |
KR20020045520 |
申请日期 |
2002.08.01 |
申请人 |
HITACHI ULSI SYSTEMS CO., LTD.;HITACHI, CO., LTD. |
发明人 |
HIGETA KEIICHI;NAKAHARA SHIGERU;SAOTOME TAKAO;SUZUKI TAKESHI;TANAKA HIROYUKI |
分类号 |
G11C11/41;G11C5/02;G11C5/06;G11C11/40;G11C11/401;G11C29/02;H01L21/82;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108;H01L27/118;(IPC1-7):G11C11/40 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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