发明名称 CHUNK CHAINING FOR A VECTOR PROCESSOR
摘要 <p>Method and apparatus for vector processing on a computer system. As the last element of a group of elements (called a "chunk") in a vector register is loaded from memory, the entire chunk is marked valid and thus made available for use by subsequent or pending operations. The vector processing apparatus comprises a plurality of vector registers, wherein each vector register holds a plurality of elements. For each of the vector registers, a validity indicator is provided wherein each validity indicator indicates a subset of the elements in the corresponding vector register which are valid. A chunk-validation controller is coupled to the validity indicators operable to adjust a value of the validity indicator in response to a plurality of elements becoming valid. An arithmetic logical functional unit (ALFU) is coupled to the vector registers to execute functions specified by program instructions. A vector register controller is connected to control the vector registers in response to program instructions in order to cause valid elements of a selected vector register to be successively transmitted to said ALFU, so that elements are streamed through said ALFU at a speed that is determined by the availability of valid elements from the vector registers. The ALFU optionally comprises a processor pipeline to hold operand data for operations not yet completed while receiving operands for successive operations. The ALFU also optionally comprises an address pipeline to hold element addresses corresponding to the operands for operations not yet completed while receiving element addresses corresponding to the operands for successive operations.</p>
申请公布号 EP0797803(B1) 申请公布日期 2003.02.19
申请号 EP19950944840 申请日期 1995.08.01
申请人 CRAY INC. 发明人 LEEDOM, GEORGE W.;MOORE, WILLIAM T.
分类号 G06F17/16;G06F9/38;G06F15/78;(IPC1-7):G06F15/78 主分类号 G06F17/16
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