发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PURPOSE: To prevent disconnection and peel-off of wiring constituting a semiconductor integrated circuit device, a bit line of a DRAM for instance. CONSTITUTION: An HDP silicon oxide film 34 is deposited by a high density plasma CVD method on the bit line BL connected with a source/drain region (17) of a MISFET for memory cell selection of a DRAM memory cell, RTA(heat treatment) is executed at 750°C, then the surface is polished and a capacitor C connected with the other source/drain region (17) of the MISFET for the memory cell selection is formed thereafter. As a result, even when the heat treatment for crystallizing a capacitive insulating tantalum oxide film constituting the capacitor C is performed, film stress applied to the bit line BL is reduced and the disconnection and peel-off of the bit line BL are prevented.
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申请公布号 |
KR20030014569(A) |
申请公布日期 |
2003.02.19 |
申请号 |
KR20020039991 |
申请日期 |
2002.07.10 |
申请人 |
HITACHI TOHBU SEMICONDUCTOR, CO., LTD.;HITACHI ULSI SYSTEMS CO., LTD.;HITACHI, CO., LTD. |
发明人 |
ASAKA KATSUYUKI;FUJIWARA TSUYOSHI;HOSHINO YOSHINORI;NARIYOSHI YASUHIRO;OHMORI KAZUTOSHI |
分类号 |
H01L21/02;H01L21/316;H01L21/3205;H01L21/768;H01L21/8242;H01L23/522;H01L27/108;(IPC1-7):H01L27/108 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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