摘要 |
A computer system couples multiple function units using channels having full-duplex, low power, point-to-point interconnect. Each function unit couples to the channel via a Channel Interface Block (CIB). The CIB includes a transmitter and a receiver. The receiver includes an integrating sampling capacitor, pass-gates having particular resistive characteristics, an auto-zero inverter, and a set of inverter stages for squaring the output of the inverter. These components are used to implement sampled-data methods and structures that perform received data extraction from the full-duplex channel signal.
|