发明名称 |
Semiconductor device having dummy patterns for metal CMP |
摘要 |
A gate electrode has a relatively long gate length of e.g., about 10 mum. In a region immediately above the gate electrode which is sandwiched between first-layer metals provided is a metal dummy pattern having a width in the first direction and extending in the second direction perpendicular to a direction of gate length (direction of current flow). Moreover, a geometric center of the metal dummy pattern in the second direction is equal to a geometric center of the gate electrode in the second direction. This maintains the symmetry in shape of the metal dummy pattern as viewed from the gate electrode. Such a structure can make deterioration in characteristics of a plurality of elements uniform while maintaining the essential effect of a metal CMP.
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申请公布号 |
US6522007(B2) |
申请公布日期 |
2003.02.18 |
申请号 |
US20010974856 |
申请日期 |
2001.10.12 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
KOUNO HIROYUKI;KUMAMOTO TOSHIO;MIKI TAKAHIRO;SATOH HISAYASU |
分类号 |
H01L23/52;H01L21/3105;H01L21/3205;H01L21/768;H01L21/82;H01L21/822;H01L21/8234;H01L23/522;H01L23/528;H01L27/04;H01L27/08;H01L29/423;H01L29/78;(IPC1-7):H01L23/48;H01L29/40 |
主分类号 |
H01L23/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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