摘要 |
PROBLEM TO BE SOLVED: To remove the noise of a line synchronizing signal in order to record image data in real time, and to correct the deviation, and to provide hardware reproducible even against the omission of the line synchronizing signal. SOLUTION: This image processor is constituted of a synchronization reset counter 1 for counting a basic clock (CLK), a register 2 for setting a value calculated by subtracting a mask release width (n) from an external line synchronizing signal cycle (m), a comparator circuit 3 for comparing the output signal (COUNT) of the synchronizing reset counter 1 with a value (m-n) set in the register 2, an NAND gate 4 for calculating the logical product of the output signal (LSYNC- MASK) of the comparator circuit 3 and an external line synchronizing signal (-LSYNC), an NOR gate 5 for calculating the logical sum of the output signal (-LSYNC1) of the NAND gate 4 and a reset signal (-RESET), and an image processing part 6 for processing an image based on the output signal (-LSYNC1) of the NAND gate 4 and image data.
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