发明名称 MULTILAYER SUBSTRATE WITH VIA FOR BUILD-UP AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a multilayer substrate with a via for build-up which is excellent in interlayer electrical connection reliability of a fined hole and its manufacturing method. SOLUTION: A hole (4) is formed by laser (5) in a desired position of a substrate (1) wherein a copper layer (2) and an insulation resin layer (3) are laminated. Electric plating is carried out while generating eddy current circularly in copper plating solution inside the hole (4) by oscillating the substrate (1) as shown by an arrow (A) in copper plating bath. As a result, an electrodeposition layer in an inner wall part surface of the hole (4) is formed thicker than an electrodeposition layer in an insulation resin layer surface (3a).
申请公布号 JP2003046250(A) 申请公布日期 2003.02.14
申请号 JP20020024817 申请日期 2002.01.31
申请人 FURUKAWA ELECTRIC CO LTD:THE 发明人 FURUYA SHUICHI
分类号 H05K3/00;C25D5/00;C25D7/12;H05K3/02;H05K3/10;H05K3/38;H05K3/42;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/00
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