| 摘要 |
PROBLEM TO BE SOLVED: To provide a system and a method for asymmetric routing lines, that has a routing wire electrically optimized. SOLUTION: This invention provides a routing architecture for interconnecting a plurality of function blocks within a programmable logic device. The routing architecture includes a plurality of wires, a first subset of a plurality of the wires directed in first and second directions with a first logical length, a second subset of a plurality of the wires directed in first and second directions with different logical lengths, and the first and second subsets of a plurality of the wires directed in the first and second directions have mutually correspondence.
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