发明名称 WIRING STRUCTURE, METHOD FOR FORMING WIRING AND SEMICONDUCTOR ELEMENT
摘要 PROBLEM TO BE SOLVED: To provide a wiring structure in which incomplete wiring is eliminated without increasing the interval of adjacent lines at a part where the surface of a first semiconductor substrate abuts on the side face of a second semiconductor substrate. SOLUTION: Wiring trenches 3 are formed on the surface 11 of a first semiconductor substrate 1 in correspondence with a specified wiring shape and a conductive path 4 is provided in the wiring trenches 3. A second semiconductor substrate 2 is bonded onto the surface 11 of the first semiconductor substrate 1 to cover a part of the conduction path 4.
申请公布号 JP2003045872(A) 申请公布日期 2003.02.14
申请号 JP20010226718 申请日期 2001.07.26
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 OKUTO TAKASHI;OKA NAOMASA;OGIWARA ATSUSHI
分类号 H01L21/3205;H01L23/52;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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