| 摘要 |
PURPOSE: A word line enable driving circuit of semiconductor memory device is provided to be capable of reducing a word line enable time by removing a boosting margin. CONSTITUTION: A boost voltage generating circuit(300) receives an external power supply voltage and generates a high voltage(Vpp) and a boosted voltage. A row decoder(200) is supplied with the boosted voltage from the boost voltage generating circuit as a power supply voltage, and outputs a normal word line enable signal(NWE) of the boosted voltage level in response to row address signals. A row address pre-decoder(40) receives other row address signals and generates four decoded address signals(DRAij). A control signal generating circuit(30) generates a control signal(PX) and an inverted control signal(PXB) in response to output signals of the pre-decoder. A sub-word line driver(100) is connected to a word line, and enables the word line in response to the normal word line enable signal of the boosted voltage level, the control signal, and the inverted control signal.
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