发明名称 TIMING RECOVERY IN DATA COMMUNICATION CIRCUITS
摘要 <p>In a 1 OOOBASE- T transceiver, a timing error detector (TED, 5) receives its inputs directly from the output of an ADC (2) and from a decision device (4). Timing recovery is acquired in three stages: a non-decision directed (NDD) stage during which only the output of an ADC (2) are used for acquisition; a stage for acquiring the remote scrambler and predicting symbols; and a decision-directed (DD) stage during which locally predicted symbols are also used for acquisition. Because the timing error detector (TED, 5) does not take inputs from the FFE (3) there is no information about cable length, and so an input of gain from an AGC is used to indicate cable length.</p>
申请公布号 WO2003013051(A2) 申请公布日期 2003.02.13
申请号 IE2002000114 申请日期 2002.07.31
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