Method and system for implementing a communications core on a single programmable device

摘要

A communications core implemented on a single programmable device. In one embodiment, the communications core may include a subsystem interconnect operable to connect the programmable device to computer; a message processor coupled to the subsystem interconnect, the message processor having an instruction set architecture that includes a data path configured to reduce hardware requirements and increase memory management capabilities; and a codec coupled to the message processor. The programmable device may also include an instruction data buffer coupled to the message processor; and a signal conditioner coupled to the codec.