发明名称 Method of automatically calibrating a phase locked loop sytem
摘要 A method for automatically calibrating a phase locked loop (PLL) system includes estimating a frequency value of an input signal applied to the system. Based on the estimated frequency value, a driving signal is generated for a plurality of internal switches in the PLL system. A PLL system may also implement this automatic calibration method.
申请公布号 US2003030425(A1) 申请公布日期 2003.02.13
申请号 US20020174525 申请日期 2002.06.18
申请人 STMICROELECTRONICS S.R.L. 发明人 DELBO SIMONA;LASLANDRA ERNESTO;PASOLINI FABIO
分类号 H03L7/089;H03L7/093;H03L7/099;H03L7/113;(IPC1-7):G01R23/12 主分类号 H03L7/089
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