发明名称 Wafer positioning check in vertical semiconductor furnaces
摘要 A wafer positioning checking system used in a vertical furnace as found in a semiconductor manufacturing facility for manufacturing chips. The system utilizes a first sensor such as a photoelectric or laser sensor that checks the peripheral alignment of the wafers loaded in the boat. A second sensor is mounted on a robot having a wafer-handling arm for checking the position of a wafer that has just been loaded into the boat. An algorithm in a control unit responds to electrical signals generated by these two sensors to allow the loading operation to continue as long as the wafers are properly positioned and to controllable monitoring the wafers during a portion of the processing.
申请公布号 US2003031535(A1) 申请公布日期 2003.02.13
申请号 US20010928263 申请日期 2001.08.10
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 YU MING-FENG;LEE KUEN-CHYR;HSIAO YI-LI;CHAN CHENG-HSUN
分类号 H01L21/00;(IPC1-7):B65G49/07 主分类号 H01L21/00
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