APPARTUS FOR EXTRACTING A CLOCK SIGNAL AND A DIGITAL DATA SIGNAL FROM AN AMPLITUDE MODULATED CARRIER SIGNAL IN A RECEIVER, WHEREIN THE SYMBOL RATE EITHER COINCIDES WITH OR IS HALFOF THE CARRIER FREQUENCY

摘要

Receivers for recovering the digital data of an amplitude modulated signal where the symbol rate coincides or is half of the carrier frequency is described. The receiver obtains the clock by comparing the signal (148, 146) to different values known to appear in every wave cycle (as many values as bits per wave cycle) and combining them (150) in order to obtain a clock corresponding to the bit rate. On the other hand, a level detector block composed of comparators (154, 156, 158) and flip-flops (162, 164, 166) determines the level of the signal and, in case of multiple level modulation , logic circuitry performs the translation from level to bit values (176, 172, 180, 178, 188, 190, 160, 194, 192, 198). Transmitters for obtaining an amplitude modulated signal according to the condition described above are al so presented.