发明名称 Method of layout compaction
摘要 It is an object of the invention to carry out layout compaction in which optical proximity effect is taken account of the irregularly disposed layout patterns also contained within circuit design data to increase the degree of integration of the semiconductor integrated circuit devices. A compaction control step generates a compaction condition; an optical proximity correction condition generation step generates an optical proximity correction information; a layout compaction step compacts an input layout pattern; an optical proximity correction step corrects an optical proximity effect: a corrected layout pattern retention step retains an optical proximity corrected layout pattern; a verification step verifies circuit operation on compacted and optical proximity corrected layout patterns; an error data retention step retains a layout pattern having any problem; the compaction control step generates a compaction condition again in which optical proximity effect and error data are taken account of; and the above-mentioned steps are repeated.
申请公布号 US2003033581(A1) 申请公布日期 2003.02.13
申请号 US20020263647 申请日期 2002.10.04
申请人 MUKAI KIYOHITO 发明人 MUKAI KIYOHITO
分类号 G03F1/08;G03F1/14;G03F1/36;G03F1/70;G06F17/50;H01L21/027;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G06F17/50 主分类号 G03F1/08
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