发明名称 Memory with row-wise write and column-wise read
摘要 A memory is organized into both rows and columns, and includes a write access circuit connected to the memory cells in a row-wise manner and a read access circuit connected to the memory cells in column-wise manner.
申请公布号 US2003031072(A1) 申请公布日期 2003.02.13
申请号 US20010923421 申请日期 2001.08.08
申请人 LOUZOUN ELIEL;HAMMAD DIMA A. 发明人 LOUZOUN ELIEL;HAMMAD DIMA A.
分类号 G11C7/10;G11C8/12;G11C11/419;(IPC1-7):G11C7/10 主分类号 G11C7/10
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