Reduced architecture for multibranch feedforward power amplifier linearizers

摘要

An amplifier linearizer circuit has a signal cancellation circuit including a signal adjuster having M branch signals (M>=1), and a distortion cancellation circuit including a signal adjuster having N branch signals (N>=1). The linearizer has a controller for adaptively controlling the M-branch and N-branch signal adjusters. The controller has only one monitor receiver to monitor the M branch signals and only one monitor receiver to monitor the N branch signals.