发明名称 HIGH-SPEED MEMORY SYSTEM
摘要 A memory system has a memory controller and a plurality of memories. The plurality of memories are connected via a switch to an end of a bus, which is connected to the memory controller, wherein the plurality of memories are controlled by the switch. By suppressing reflection and loads on the bus, a higher data transmission speed can be obtained.
申请公布号 KR20030012893(A) 申请公布日期 2003.02.12
申请号 KR20027017505 申请日期 2001.06.20
申请人 发明人
分类号 G06F3/00;G11C7/00;G06F12/00;G06F13/16;G11C7/10 主分类号 G06F3/00
代理机构 代理人
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