发明名称 Combined resist strip and barrier etch process for dual damascene structures
摘要 A method of etching a stack is provided. Generally, a trench patterned resist layer is placed over a dielectric layer of the stack. A trench is partially etched into the dielectric layer. A simultaneous stripping of the trench patterned resist layer, etching the barrier layer, and etching the trench is then performed. As a result an etch stack may be provided with less damage. The method may be used to provide a dual damascene structure. The dual damascene structure may be provided by etching a via before placing the trench patterned resist layer over the dielectric layer of the stack.
申请公布号 US6518174(B2) 申请公布日期 2003.02.11
申请号 US20000746894 申请日期 2000.12.22
申请人 LAM RESEARCH CORPORATION 发明人 ANNAPRAGADA RAO;SADJADI REZA
分类号 H01L21/311;H01L21/768;(IPC1-7):H01L21/476;H01L21/302 主分类号 H01L21/311
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