发明名称 METHOD FOR MANUFACTURING SOLID STATE MEMORY DEVICE
摘要 PURPOSE: A method for manufacturing a solid state memory device is provided to form a level of the device, identify defective areas in the level, and program an address logic of the level to avoid the defective areas in the level. CONSTITUTION: A level of a device is formed(302). Defective areas are identified in the level(304). An address logic of the level is programmed to avoid the defective areas in the level(306). At least one additional level of the device is formed(308,302). The address logic of each additional level is programmed to avoid defects. The address logic is programmed by identifying the lines associated with defective areas in the level and increasing the density of current flowing through the identified lines until links in the identified lines are opened. The current density is increased by irradiating the links.
申请公布号 KR20030011601(A) 申请公布日期 2003.02.11
申请号 KR20020043157 申请日期 2002.07.23
申请人 HEWLETT-PACKARD COMPANY 发明人 HOGAN JOSH N.
分类号 H01L27/10;G06F17/50;G11C29/00;G11C29/04;(IPC1-7):G06F17/50 主分类号 H01L27/10
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