System and method of background offset cancellation for flash ADCs

摘要

A background offset cancellation technique based on interleaved auto-zero (IAZ) architecture for flash ADCs, moves the reference tap values up and down to accommodate auto-zeroing of differential comparators rather than switching the differential comparator reference point between two distinct reference taps. The technique eliminates a large number of complementary switches necessary to provide the reference tap values leading to substantial savings in area and power, and provides for improved settling characteristics of the reference ladder.