发明名称 METHOD FOR INSULATING INTEGRATED-CIRCUIT COMPONENTS
摘要 FIELD: manufacture of submicron-size silicon integrated circuits. SUBSTANCE: latent dielectric layer of insulation bottom part is formed by thermal oxidation of silicon with layer incorporating radiation defects produced in silicon in advance. To this end use is made of method for implanting accelerated ions of elements which do not produce doping donors or acceptors of 50-200 keV at dose rate of 1.1016-1.1017 cm-2 and temperatures of 500-850 C in silicon. Masking layer of silicon nitride is produced with ports spaced apart through maximum L, this length being found from formula where D is oxygen ratio at thermal oxidation of silicon on mentioned silicon layer incorporating radiation defects; t is oxidation time. EFFECT: reduced unsoundness of insulating areas; facilitated manufacture of integrated circuits. 5 cl, 7 dwg
申请公布号 RU2198451(C2) 申请公布日期 2003.02.10
申请号 RU20000128808 申请日期 2000.11.20
申请人 TAKESHI SAITO;MURASHEV VIKTOR NIKOLAEVICH 发明人 TAKESHI SAITO;MURASHEV V.N.;LADYGIN E.A.;MORDKOVICH V.N.;GORNEV E.S.;KRASNIKOV G.JA.
分类号 H01L21/76 主分类号 H01L21/76
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